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INTEGRATED CIRCUITS
DATA SHEET
PCF85116-3 2048 x 8-bit CMOS EEPROM with I2C-bus interface
Product specification Supersedes data of 1997 Feb 24 File under Integrated Circuits, IC12 1997 Apr 02
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
CONTENTS 1 2 2.1 3 4 5 6 7 8 8.1 8.2 8.3 8.4 8.4.1 8.4.2 8.4.3 8.5 8.5.1 FEATURES DESCRIPTION Remark QUICK REFERENCE DATA ORDERING INFORMATION DEVICE SELECTION BLOCK DIAGRAM PINNING I2C-BUS PROTOCOL Bus conditions Data transfer Device addressing Write operations Byte/word write Page Write Remark Read operations Remark 9 10 11 12 13 14 14.1 14.2 14.2.1 14.2.2 14.3 14.3.1 14.3.2 14.3.3 15 16 17 LIMITING VALUES CHARACTERISTICS
PCF85116-3
I2C-BUS CHARACTERISTICS WRITE CYCLE LIMITS PACKAGE OUTLINES SOLDERING Introduction DIP Soldering by dipping or by wave Repairing soldered joints SO Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
1997 Apr 02
2
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
1 FEATURES 2 DESCRIPTION
PCF85116-3
* Low power CMOS: - maximum operating current 1.0 mA - maximum standby current 10 A (at 5.5 V), typical 4 A * Non-volatile storage of 16 kbits organized as eight blocks of 256 x 8-bit each * Single supply with full operation down to 2.7 V * On-chip voltage multiplier * Serial input/output I2C-bus (100 kbits/s standard-mode and 400 kbits/s fast-mode) * Write operations: multi byte write mode up to 32 bytes * Write-protection input * Read operations: - sequential read - random read * Internal timer for writing (no external components) * Power-on-reset * High reliability by using redundant EEPROM cells * Endurance: 1000000 Erase/Write (E/W) cycles at Tamb = 22 C * 20 years non-volatile data retention time (minimum) * Pin and address compatible to the PCx85xxC-2 family (see also Section 2.1) * 2 kV ESD protection (Human Body model). 3 QUICK REFERENCE DATA SYMBOL VDD IDDR IDDW Istb PARAMETER supply voltage supply current read supply current E/W standby supply current
The PCF85116-3 is an 16 kbits (2048 x 8-bit) floating gate Electrically Erasable Programmable Read Only Memory (EEPROM). By using redundant EEPROM cells it is fault tolerant to single bit errors. In most cases multi bit errors are also covered. This feature dramatically increases reliability compared to conventional EEPROM memories. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Only one PCF85116-3 device is required to support all eight blocks of 256 x 8-bit each. Timing of the E/W cycle is carried out internally, thus no external components are required. A write-protection input at pin 7 (WP) allows disabling of write-commands from the master by a hardware signal. When pin 7 is HIGH the data bytes received will not be acknowledged by the PCF85116-3 and the EEPROM contents are not changed. 2.1 Remark
The PCF85116-3 is pin and address compatible to the PCx85xxC-2 family. The PCF85116-3 covers the whole address space of 16 kbits; address inputs are no longer needed. Therefore, pins 1 to 3 are not connected. The write-protection input is at pin 7.
CONDITIONS fSCL = 400 kHz; VDD = 5.5 V fSCL = 400 kHz; VDD = 5.5 V VDD = 2.7 V VDD = 5.5 V - - - -
MIN. 2.7
MAX. 5.5 1.0 1.0 6 10 V
UNIT mA mA A A
1997 Apr 02
3
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
4 ORDERING INFORMATION TYPE NUMBER PCF85116-3P PCF85116-3T 5 PACKAGE NAME DIP8 SO8 DESCRIPTION plastic dual in-line package; 8 leads (300 mil) plastic small outline package; 8 leads; body width 3.9 mm
PCF85116-3
VERSION SOT97-1 SOT96-1
DEVICE SELECTION Device selection code DEVICE CODE b7(1) 1 b6 0 b5 1 b4 0 b3 MEM SEL CHIP ENABLE b2 MEM SEL b1 MEM SEL R/W b0 R/W
Table 1
SELECTION Bit Device Note
1. The Most Significant Bit (MSB) `b7' is sent first.
1997 Apr 02
4
6
1997 Apr 02
WP 7 I2C-BUS CONTROL LOGIC
VDD
8
Philips Semiconductors
SCL
6
BLOCK DIAGRAM
SDA
5
INPUT FILTER
n
TEST MODE REGISTER SEQUENCER
ADDRESS COMPARATOR
SHIFT REGISTER
ADDRESS POINTER
5
2048 x 8-bit CMOS EEPROM with I2C-bus interface
5
COLUMN DECODER HV GENERATOR PAGE REGISTER 6 ROW DEC OSCILLATOR DIVIDER EEPROM ARRAY (8 x 256 x 8)
MBH922
PCF85116-3
POWER-ON-RESET
4
VSS
PCF85116-3
Product specification
Fig.1 Block diagram.
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
7 PINNING PIN 1 2 3 4 5 6 7 8 DESCRIPTION not connected not connected not connected negative supply voltage serial data input/output (I2C-bus) serial clock input (I2C-bus) write-protection input positive supply voltage
n.c. VSS 3 4
MBH923
PCF85116-3
SYMBOL n.c. n.c. n.c. VSS SDA SCL WP VDD 8
handbook, halfpage
n.c. n.c.
1 2
8 7
VDD WP SCL SDA
PCF85116-3
6 5
Fig.2 Pin configuration.
I2C-BUS PROTOCOL
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The serial bus consists of two bidirectional lines: one for data signals (SDA), and one for clock signals (SCL). Both the SDA and SCL lines must be connected to a positive supply voltage via a pull-up resistor. The following protocol has been defined: * Data transfer may be initiated only when the bus is not busy * During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is HIGH will be interpreted as control signals. 8.1 Bus conditions
Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I2C-bus specifications a low-speed mode (2 kHz clock rate), a high speed mode (100 kHz clock rate) and a fast speed mode (400 kHz clock rate) are defined. The PCF85116-3 operates in all three modes. By definition a device that sends a signal is called a `transmitter', and the device which receives the signal is called a `receiver'. The device which controls the signal is called the `master'. The devices that are controlled by the master are called `slaves'. Each byte is followed by one acknowledge bit. This acknowledge bit is a HIGH level, put on the bus by the transmitter. The master generates an extra acknowledge related clock pulse. The slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte. The master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Set-up and hold times must be taken into account. A master receiver must signal an end of data to the slave transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master generation of the STOP condition.
The following bus conditions have been defined: * Bus not busy: both data and clock lines remain HIGH. * Start data transfer: a change in the state of the data line, from HIGH-to-LOW, while the clock is HIGH, defines the START condition * Stop data transfer: a change in the state of the data line, from LOW-to-HIGH, while the clock is HIGH, defines the STOP condition * Data valid: the state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data. 8.2 Data transfer
Each data transfer is initiated with a START condition and terminated with a STOP condition; the number of the data bytes, transferred between the START and STOP conditions is limited to 32 bytes in the E/W mode. 1997 Apr 02 6
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
8.3 Device addressing 8.4.2 PAGE WRITE
PCF85116-3
handbook, halfpage handbook, halfpage
read: auto increment
1
0
1
0
B
B
B
R/W
MBH924
B
B
B
WORD ADDRESS write: auto increment
MBH925
write: unchanged
Fig.3 Slave address.
Fig.4 Auto increment of memory address.
Following a START condition the bus master must output the address of the slave it is accessing. The 4 MSBs of the slave address are the device type identifier (see Fig.3). For the PCF85116-3 this is fixed to `1010'. The next three significant bits of the slave address field are the block selection bits. It is used by the host to select one out of eight blocks (1 block = 256 bytes of memory). These are, in effect, the three most significant bits of the word address. The last bit of the slave address defines the operation to be performed. When R/W is set to logic 1 a read operation is selected. 8.4 8.4.1 Write operations BYTE/WORD WRITE
The PCF85116-3 is capable of an 32-byte page write operation. It is initiated in the same manner as the byte write operation. The master can transmit up to 32 data bytes within one transmission. After receipt of each byte the PCF85116-3 will respond with an acknowledge. The master terminates the transfer by generating a STOP condition. The maximum total E/W time in this mode is 10 ms. After the receipt of each data byte the six high order bits of the memory address providing access to one of the 64 pages of the memory remain unchanged. The five low order bits of the memory address will be incremented only (see Fig.3). By these five bits a single byte within the page in access is selected. By an increment the memory address may change from 31 to 0, from 63 to 32, etc. If the master transmits more than 32 bytes prior to generating the STOP condition, data within the addressed page may be overwritten and unpredictable results may occur. As in the byte write operation, all inputs are disabled until completion of the internal write cycles. 8.4.3 REMARK
For a write operation the PCF85116-3 requires a second address field. This address field is a word address providing access to any one of the eight blocks of memory. Upon receipt of the word address the PCF85116-3 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master terminates the transfer by generating a STOP condition. After this stop condition the E/W cycle starts and the bus is free for another transmission. Its duration is maximum 10 ms. During the E/W cycle the slave receiver does not send an acknowledge bit if addressed via the I2C-bus.
Write accesses to the EEPROM are enabled if the pin WP is LOW. When WP is HIGH the EEPROM is write-protected and no acknowledge will be given by the PCF85116-3 when data is sent. However, an acknowledge will be given after the slave address and the word address.
1997 Apr 02
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Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
PCF85116-3
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
BBB0A
WORD ADDRESS
A
DATA
A
DATA
A
P
SLAVE ADDRESS
R/W auto increment word address auto increment word address
MBH926
Fig.5 Auto increment memory address; two byte write.
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from slave
S
BBB0A
WORD ADDRESS
A
DATA N
A
DATA N + 1
A
SLAVE ADDRESS
R/W auto increment word address auto increment word address
acknowledge from slave
DATA N + 31
A
P
last byte
MBH927
auto increment word address
Fig.6 Page write operation; 32 bytes.
1997 Apr 02
8
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
8.5 Read operations 8.5.1 REMARK
PCF85116-3
Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address (R/W) is set to logic 1. There are three basic read operations; current address read, random read and sequential read.
During read operations all bits of the memory address are incremented after each transmission of a data byte. Contrary to write operations an overflow of the memory address occurs from 2047 to 0 (see Fig.3).
handbook, full pagewidth
acknowledge from slave
acknowledge from slave
acknowledge from slave
acknowledge from master
S
BBB0A
WORD ADDRESS
A
S
BBB1A
DATA
A
SLAVE ADDRESS
R/W
SLAVE ADDRESS at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter
R/W
n bytes auto increment word address
no acknowledge from master
DATA
1
P
last byte
MBH928
auto increment word address
Fig.7 Master reads PCx85116-3 slave after setting word address (write word address; read data).
handbook, full pagewidth
acknowledge from slave
acknowledge from master
no acknowledge from master
S
BBB1A
DATA n bytes
A
DATA last bytes
1
P
SLAVE ADDRESS
R/W
auto increment word address
auto increment word address
MBH929
Fig.8 Master reads PCx85116-3 immediately after first byte (read mode).
1997 Apr 02
9
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI II IO Tstg Tamb Vesd Note PARAMETER supply voltage input voltage on any pin input current on any pin output current storage temperature operating ambient temperature electrostatic discharge voltage note 1 Zi > 500 CONDITIONS MIN. -0.3 VSS - 0.8 - - -65 -40 2
PCF85116-3
MAX. +6.5 +6.5 1 10 +150 +85 - V V
UNIT
mA mA C C kV
1. ESD Human Body model Q22 at Tamb = 22 C; discharge procedure according to MIL-STD-883C Method 3015. 10 CHARACTERISTICS VDD = 2.7 to 5.5 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL Supplies VDD IDDR IDDW IDD(stb) supply voltage supply current read supply current E/W standby supply current fSCL = 400 kHz; VDD = 5.5 V fSCL = 400 kHz; VDD = 5.5 V VDD = 2.7 V VDD = 5.5 V SDA input/output (pin 5) VIL VIH VOL1 VOL2 ILO to(f) output leakage current output fall time from VIHmin to VILmax with up to 3 mA sink current at VOL1 with up to 6 mA sink current at VOL2 tSP CI pulse width of spikes suppressed by filter input capacitance VI = VSS LOW level input voltage HIGH level input voltage LOW level output voltage IOL = 3 mA; VDD(min) IOL = 6 mA; VDD(min) VOH = VDD note 1 20 + 0.1Cb 250 20 + 0.1Cb 250 0 - 100 10 ns ns ns pF -0.8 0.7VDD - - - +0.3VDD 6.5 0.4 0.6 1 V V V V A 2.7 - - - - 5.5 1.0 1.0 6 10 V mA mA A A PARAMETER CONDITIONS MIN. MAX. UNIT
1997 Apr 02
10
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
SYMBOL SCL input (pin 6) VIL VIH ILI fSCL tSP CI VIL VIH tS Note 1. The bus capacitance ranges from 10 to 400 pF (Cb = total capacitance of one bus line in pF). LOW level input voltage HIGH level input voltage input leakage current clock input frequency pulse width of spikes suppressed by filter input capacitance VI = VSS VI = VDD or VSS -0.8 0.7VDD - 0 0 - -0.8 0.9VDD Tamb = 55 C 20 PARAMETER CONDITIONS MIN.
PCF85116-3
MAX.
UNIT
+0.3VDD 6.5 1 400 100 7
V V A kHz ns pF
WP input (pin 7) LOW level input voltage HIGH level input voltage +0.1VDD VDD + 0.8 - V V
Data retention time data retention time years
11 I2C-BUS CHARACTERISTICS All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing from VSS to VDD. STANDARD MODE SYMBOL fSCL tBUF tHD;STA tLOW tHIGH tSU; STA tHD; DAT PARAMETER clock frequency time the bus must be free before new transmission can start START condition hold time after which first clock pulse is generated LOW level clock period HIGH level clock period set-up time for START condition data hold time for CBUS compatible masters for I2C-bus devices tSU; DAT tr tf tSU; STO Notes 1. The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by a transmitter. 2. Cb = total capacitance of one bus line in pF. data set-up time SDA and SCL rise time SDA and SCL fall time set-up time for STOP condition note 1 5 0 250 - - 4.0 - - - 1000 300 - - 0 100 20 + 20 + 0.6 0.1Cb(2) 0.1Cb(2) - - - 300 300 - s ns ns ns ns s repeated start CONDITIONS MIN. 0 4.7 4.0 4.7 4.0 4.7 MAX. 100 - - - - - 0 1.3 0.6 1.3 0.6 0.6 MIN. MAX. 400 - - - - - kHz s s s s s FAST MODE UNIT
1997 Apr 02
11
handbook, full pagewidth
1997 Apr 02
tf t HD;STA
Philips Semiconductors
SDA
t BUF
t LOW
2048 x 8-bit CMOS EEPROM with I2C-bus interface
12
S
t HIGH t SU;DAT tr t HD;DAT t SU;STA
SCL
P
S
P
t HD;STA
MBA705
t SU;STO
P = STOP condition; S = START condition.
PCF85116-3
Product specification
Fig.9 Timing requirements for the I2C-bus.
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
12 WRITE CYCLE LIMITS
PCF85116-3
The Power-on-reset circuit resets the I2C-bus logic with a set-up time of 10 s.Enabling the chip is achieved by connecting the WP input to VSS. SYMBOL E/W cycle timing tE/W Endurance NE/W E/W cycle per byte Tamb = -40 to +85 C Tamb = 22 C 100000 - - - cycles cycles 1000000 - E/W cycle time - - 10 ms PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1997 Apr 02
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Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
13 PACKAGE OUTLINES SO8: plastic small outline package; 8 leads; body width 3.9 mm
PCF85116-3
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 0.24 0.23 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.0098 0.057 0.069 0.0039 0.049
0.019 0.0098 0.014 0.0075
0.039 0.028 0.041 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03S JEDEC MS-012AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
1997 Apr 02
14
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
PCF85116-3
DIP8: plastic dual in-line package; 8 leads (300 mil)
SOT97-1
D seating plane
ME
A2
A
L
A1
c Z e b1 wM (e 1) b2 5 MH
b 8
pin 1 index E
1
4
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001AN EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
1997 Apr 02
15
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
14 SOLDERING 14.1 Introduction
PCF85116-3
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). 14.2 14.2.1 DIP SOLDERING BY DIPPING OR BY WAVE
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. 14.3.2 WAVE SOLDERING
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.3.3 REPAIRING SOLDERED JOINTS
The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.2.2 REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. 14.3 14.3.1 SO REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1997 Apr 02
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Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
15 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCF85116-3
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 16 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1997 Apr 02
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Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
NOTES
PCF85116-3
1997 Apr 02
18
Philips Semiconductors
Product specification
2048 x 8-bit CMOS EEPROM with I2C-bus interface
NOTES
PCF85116-3
1997 Apr 02
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2870, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
417067/1200/02/pp20
Date of release: 1997 Apr 02
Document order number:
9397 750 01994

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